ORSoC -

Frukostseminarie om OpenCores och OpenRISC den 27:e mars i Göteborg.

orsoc — Tue, 28 Feb 2012 08:52:34 +0000

Välkommen till ORSoCs frukostseminarie om OpenCores och OpenRISC den 27:e mars i Göteborg!

Vad betalar du för egentligen när du köper in RTL IPn? Hur stort är open source för ASIC/FPGA?

Är det här frågor du ställt dig eller är du nyfiken på open source hårdvara? Då är du välkommen till vårt frukostseminarie. Vi skall presentera OpenCores som är ett community för Open Source RTL-konstruktioner där bl.a. RISC-processorn OpenRISC utvecklas och tala om fördelarna med att använda Open Source IPn. ORSoCs OpenRISC-baserade plattform kommer också att presenteras och hur den kan utökas, användas och integreras med befintliga produkter. I slutet av seminariet kommer vi att demonstrera hur man laddar in en SoC med komponenter från OpenCores på ett FPGA-utvecklingskort och startar Linux.

Under seminariet bjuder vi på frukost och vi kommer även att lotta ut utvecklingskortet vi använt oss av. (http://orsoc.se/altera-fpga-development-board)

Vi som kommer att hålla i seminariet är Olof Kindgren och Daniel Eriksson.

Seminariet kommer att hållas den 27:e mars kl 8:00 och pågår i ca 45 minuter.
Plats för presentationen är lokalen Marsstrand i Södra Porten på Flöjelbergsgatan 1C i Mölndal. Närmsta busshållplats är Bergfotsgatan. Mer information om hur man hittar finns här.

Skicka en anmälan till frukostseminarie@orsoc.se senast den 20:e mars, med kontaktinformation samt information om vilket företag ni jobbar för och vad ni har för roll där.

Varma välkomna!

New FPGA Development board

orsoc — Mon, 21 Nov 2011 12:19:53 +0000

ORSoC has designed a new OpenRISC-FPGA-development board that is specially designed to match OpenRISC processor SoC designs. The board supports the most common/wanted interfaces, with a small physical size and easy connections/debugging solution. We offer this powerful board as a low-cost FPGA development board.

This board enables easy access to the OpenRISC platform and gives the designer a fast start. The board is shipped with a pre-defined OpenRISC-SoC-design and includes everything to make sure you have an OpenRISC processor system up and running in no time.

We have also created a new VirtualBox-image with all OpenRISC tools pre-installed and with detailed HowTo-guides, focusing allot on making sure that all users can get started easily using the OpenRISC processor FPGA design.

The development kit includes the following

ALTERA Cyclone IV E, 22K LUT
SDRAM 32 Mbyte
SPI FLASH, 1 Mbyte
SDIO micro connector
Fast Ethernet
USB “on-the-go” HOST/SLAVE
USB power, configuration, UARTs
Expansion connectors (optional)

The board has a small size of only 80×40 mm.

Read more about this board here

ORSoC – Technology Fast 500 EMEA

orsoc — Tue, 01 Nov 2011 13:55:57 +0000

ORSoC is recognized by Deloitte as one of the 50 fastes growing technology companies in Sweden and is in the list of top 500 fastest-growing technology companies across EMEA.

The programme recognises the 50 fastes growing companies in Sweden and the 500 fastest-growing technology companies across Europe, the Middle East and Africa (EMEA), based on percentage revenue growth over the last five years.

OpenRISC support in latest Linux 3.1 release

orsoc — Mon, 24 Oct 2011 19:17:42 +0000

Linus Torvalds released Linux 3.1 this Monday with a long and exciting new feature list.

Linux 3.1 includes support for the OpenRISC processor from OpenCores.org

The complete list of new features can be found at kernelnewbies.

We have a goal to get the OpenRISC processor to be one of the most popular

processors in the world. One big step in this work is to get the OpenRISC into the Linux

kernel.

It started back in 2006 when we, within the company ORSoC, decided that we should

“shape-up” the OpenRISC processor. This was after we found a severe bug in the

OpenRISC after implemented it into a structured ASIC chip.

We, together with participants, corrected several bugs and did general improvements

to the actual OpenRISC hardware implementation during 2006-2009. When this was

done we realized that the toolchain and Linux port was very out-dated and in a

bad shape, so our focus changed to get the “software side” back on track again.

The work to port the latest Linux-kernel release to the OpenRISC processor was done

during 2010-2011. During the same period a lot of work was done to upgrade the GCC

compiler port. With all this in place, the OpenRISC project finally reached a very important milestone - getting Linux into the official release.

With version 3.1 of Linux, the OpenRISC processor is now one of the few open source processor architectures that are officially supported.

This mile stone is very important and gives many nice features. We are sure this will even further accelerate the usage of the OpenRISC processor in embedded products.

ORSoC participates in FSCONS, scandinavia’s largest Free Software conference

orsoc — Tue, 11 Oct 2011 16:50:50 +0000

At FSCONS, November 11-13, ORSoC will co-host a talk about the OpenRISC project and a workshop with hands-on development for the OpenRISC platform.

The talk will present the design of the architecture together with history, future and the current state of OpenRISC and the OpenCores ecosystem.

The software support will be focused on Linux, with mentioning of the other supported OS:s.

The workshop will take the participants from a software design simulated in the architecure simulator to a FPGA-accelerated design running on a OpenRISC development board complete with driver support.

Concepts such as modularity, software support, HW/SW debugging and system architecture will be covered during the workshop.

The new OpenRISC development boards from ORSoC that are used in the workshop will also be sold at the conference.

The goal is to provide a cost-effective HW/SW platform that is fully compatible with IP:s from OpenCores, for further OpenRISC development

ORSoC has employed Xing Zhao to our Stockholm office.

orsoc — Fri, 30 Sep 2011 16:42:04 +0000

Xing has an extensive experience from both FPGA and ASIC design and verification. Xing has also good knowledge in UVM (verification metadology).

ORSoC will do a presentation in the Embedded conference:

orsoc — Tue, 20 Sep 2011 09:10:50 +0000

The conference is taking place in Stockholmsmässan, Stockholm Sweden the 4-5^th of October 2011

ORSoC will present:
“Hardware IPs as open source – the future of SoC design and FPGA / ASIC development”

Right now there is running a number of interesting FPGA projects based on the open source processor “OpenRISC12000” from OpenCores.org and the associated development platform from ORSoC. Some of the key benefits of using open source Ips for SoC design are:

Minimize “end of life problems”
License “freedom” regarding both licensing costs and lock-in effects.
Full access to source code means faster development, debugging and verification.
Improved copy protection – especially when it comes to using an embedded processor in combination with internal hardware accelerator.

Besides the obvious benefits (some stated above) the major driving force for so many projects in based on open source techology starts right now is that the tool chain and the unique verification environments is state of the art (bleeding edge). In many cases far ahead of the “commercial” options. The OpenRISC1200 processor is now ported to the latest Linux version 2.6.38. Work is continuing on 2.6.39. Even this is ahead of most competitors.

Our presentation will provide an overview of open source within HW.

What type of IPs available?
What is / happens on OpenCores – world’s largest site/community for open source development?
What are the major benefits of open source HW (direct and indirect)?
What tools and environments are available?
Who uses this technology today?

Many developers have for a long time understood the great advantages of open source technology. Since about a year back all puzzle pieces are in place, i.e. predesigned platforms, bleeding edge tool chains and unique verification environment. This has opened up for anyone who wants to base their products on OpenCores technology to effectively pursue development projects.

Presenter Johan Rilegård

ORSoC has employed Nikos Anastasiadis

orsoc — Mon, 12 Sep 2011 09:01:37 +0000

Nikos is working in the field of FPGA design and has also experience from verification.

For more information about available resources, please contact Johan Rilegård: +46 70 824 80 30

ORSoC has employed Per Larsson

orsoc — Thu, 01 Sep 2011 09:00:01 +0000

Per has been working with FPGA development of more than 15 years and have extensive knowledge in field. We are glad to have Per in our team.

For more information about available resources, please contact Johan Rilegård: +46 70 824 80 30

ORSoC will attend to the yearly FPGA-World conference in Kista.

orsoc — Wed, 10 Aug 2011 10:34:01 +0000

Please come and visit us in our both and/or listen to our presentation (Howto design a complex efficient SoC design based on OpenRISC processor)

The conference is taking place in Electrum Kista, Stockholm Sweden the 13^th of September 2011.